Information from NewRisingSun on extended addressing mode bits on the Tandy 1000 line, taken from http://www.vintage-computer.com/vcforum/showthread.php?50324-IntroJR-demo-modified-to-work-properly-on-Tandy-1000s&p=398738#post398738

Only bit 0 is of importance; it enables the "extended addressing mode". The other bits control an extended video memory size of 256K rather than 128K, which only the EX, SX and HX support and is useless anyway (who needs that many pages?). "Extended adressing mode" basically changes the meaning of bits 6 and 7 of 3DF.

3D8 bit 1=0, 3DD bit 0=0, 3DF bit 7=0, 3DF bit 6 ignored: fully linear video memory, used only in BIOS text modes.
3D8 bit 1=1, 3DD bit 0=0, 3DF bit 7=0, 3DF bit 6 ignored: Row Address bit 0 selects one of two 8K banks within video page. Used in 320x200x4, 640x200x2 and 160x200x2 modes. Reason: the original MC6845's vertical displayed register was only 7 bits wide and thus could not count to 200 rows. Hence, it is programmed to 100 rows with 2 scanlines per row.
3D8 bit 1=1, 3DD bit 0=0, 3DF bit 7=1, 3DF bit 6=1: Row Address bits 0 and 1 select one of four 8K banks within video page. Used in 320x200x16 and 640x200x4 modes. Reason: same as above, plus the original MC6845 only has 14 bits for the video memory address. Hence, it is programmed to 50 rows with 4 scanlines per row.
3D8 bit 1=1, 3DD bit 0=0, 3DF bit 7=1, 3DF bit 6=0: Row Address bit 1 selects 16K bank within video page. No practical use known.
3D8 bit 1=1, 3DD bit 0=1, 3DF bit 7 ignored, 3DF bit 6=0: fully linear video memory, not used by any BIOS mode. Can be used to create a fully linear 160x200x16 or 320x200x16 mode by setting the Maximum Scanline register to 0, the Vertical Displayed register to 200 and the rest accordingly. This is possible as the EX and later Tandys use a 6845 clone with an 8 bits wide row counter and 15 bits for video memory address. When not updating the Maximum Scanline register as described, a 160x100 or 320x50 mode is created.
3D8 bit 1=1, 3DD bit 0=1, 3DF bit 7 ignored, 3DF bit 6=1: Row Address bit 0 selects one of two 32K banks within (two-screen) video page. Used in 160x200x16/320x200x16 mode when creating a virtual 160x400x16/320x400x16 screen for vertical scrolling using the CRT start address registers. The more likely application for this is 400 line interlace mode, which I managed to get working on the TX.

On the SL/TL/RL, 3DD does not exist at all; its function has moved to 3DA/3DE index 5 bit 0. So it's a good idea to update both registers for compatibility, and to reset them when finished, as the SL/TL BIOS does not reset them when changing video modes.