ISA Trace and Performance Adapter

P/N 93F2637 (74F5122A???)

CD0 DB9
CD1 93F2760 Even
CD2 93F2768 ODD
CD3 RPL
S1 Configuration
ZM3,4 64kx1 MT5C6401DJ-35
ZM5 51F1439
ZM7,10 32kx8 SRM20256LM10
Y1 32.0MHz osc
1

S1 Switches
 1  2  3  4  5  6    7  8    9     10  11      12        OFF (Up)
 ROM Base Address    IRQ    I/O  Shared RAM   Data Rate  ON (Down)
 

ROM Base Address 
 1   2  3   4   5   6  Setting
OFF ON ON  OFF OFF ON X'CC000'
OFF ON OFF OFF OFF ON X'DC000'

   The settings above are typical. However, you may set other ROM Base Address values. The ROM Base Address is defined as follows:

          ROM Base Address: b'1S1S2S3 S4S5S60 0000 0000 0000'

  Where S1 corresponds to switch 1, S2 corresponds to switch 2, and so on. OFF = b'1', ON = b'0'.

Interrupt Level
7     8    Setting
ON    ON   IRQ 2(9)
ON    OFF  IRQ 3
OFF   ON   IRQ 6
OFF   OFF  IRQ 7

I/O Base
9     Setting
OFF   X'0A20' / Primary
ON    X'0A24' / Alternate

Shared RAM Size
10    11   Setting
ON    ON    8 KB
OFF   ON   16 KB
ON    OFF  32 KB
OFF   OFF  64 KB

Data Rate
12   Setting
OFF  16 Mbps
ON    4 Mbps

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